Module Tjr_btree
Export the main functionality of this library.
Usage: open Tjr_btree;; open Tjr_btree.Btree_intf;;
include Tjr_btree__.Summary
Note about crash correctness
Essentially we have to assume that the B-tree writes hit disk in order (ie there is a barrier operation after each write).
In order to make the B-tree fast, we have to use a persistent cache in front.
Fortunately, providing we have the persistent cache, I believe/hope (but have certainly not proved) that the combination (pcache+btree) is crash safe. The reason is that if we crash in the middle of modifying the B-tree, we can replay the operations from the pcache, and this has the effect of fixing up the B-tree.
The persistent cache is on github, as "tjr_pcache".
Main interfaces
module Btree_intf : sig ... end
A collection of the main interfaces. This should be read first.
module Pvt : sig ... end
module Make_1 : sig ... end
Main functionality: disk to map
module Make_6 : sig ... end
Most recent interface, this time based on layers
type ('k, 'v, 'r, 't, 'leaf, 'node, 'dnode, 'ls, 'blk, 'wbc) btree_factory
= ('k, 'v, 'r, 't, 'leaf, 'node, 'dnode, 'ls, 'blk, 'wbc) Make_6.btree_factory
val btree_examples : < int_int_factory : (int, int, Make_6.Examples.Int_int.r, Make_6.Examples.Int_int.t, Make_6.Examples.Int_int.leaf, Make_6.Examples.Int_int.node, (Make_6.Examples.Int_int.node, Make_6.Examples.Int_int.leaf) Isa_btree.dnode, Make_6.Examples.Int_int.ls, Make_6.Examples.Int_int.blk, Make_6.Examples.Int_int.wbc) Tjr_btree__Make_6.btree_factory; int_r_factory : (Make_6.Examples.Int_r.k, Make_6.Examples.Int_r.v, Make_6.Examples.Int_r.r, Make_6.Examples.Int_r.t, Make_6.Examples.Int_r.leaf, Make_6.Examples.Int_r.node, (Make_6.Examples.Int_r.node, Make_6.Examples.Int_r.leaf) Isa_btree.dnode, Make_6.Examples.Int_r.ls, Make_6.Examples.Int_r.blk, Make_6.Examples.Int_r.wbc) Tjr_btree__Make_6.btree_factory; >
Bin prot marshalling
module Bin_prot_marshalling : sig ... end
Marshal frames to blocks using binprot FIXME needs polish. Currently assumes that blk_ids are ints.
Misc
module Debug_ : sig ... end